000 00512nam a22001817a 4500
003 OSt
005 20240328123758.0
008 240322b |||||||| |||| 00| 0 eng d
020 _a9788190935630
040 _cSJCLIB
100 _aAshenden, Peter J.
_944143
245 _aDigital Design :
_bAn Embedded Systems Approach Using Verilog
260 _aNew Delhi
_bElsevier, RELX India Pvt Ltd.
_c2008
300 _axx, 557 p.
600 _tElectronics
_91351
942 _2ddc
_cBK
999 _c158130
_d158130