000 00632nam a22002177a 4500
003 OSt
005 20220607134645.0
008 220401b |||||||| |||| 00| 0 eng d
020 _a9788177589184
028 _bSapna Books House
_cGNSH21CRB8016
_d18-03-2022
040 _cSJCLIB
100 _a Palnitkar, Samir
_946177
245 _aVerilog HDL :
_c A Guide to Digital Design and Synthesis IEEE 1364-2001 Compliant
250 _a2nd
260 _aIndia
_b Pearson Education Limited
_c2003
300 _a490
600 _tElectronics
_91351
650 _aElectronics
_923201
942 _2ddc
_cBK
999 _c154464
_d154464